This invention relates to a method of improving the yields of integrated semiconductor circuits by minimizing the number of pipes which result in shorts or leakage between impurity regions of semiconductor devices. More specifically, it relates to the reduction of pipes in impurity regions which are defined by composite silicon dioxide-silicon nitride masking layers during the formation of said regions.
The present aim in semiconductor integrated circuit technology is to achieve higher levels of integration so that tens of thousands of circuits can be fabricated on a semiconductor chip of around 200 mils square. To achieve such levels the individual impurity regions in the semiconductor must be extremely small. For example, semiconductor designers are now fabricating emitter regions in bipolar transistors which are around 0.03 square mils.
Because of this high packing density, as already discussed in the above-referenced, copending application, the presence of micro-defects such as precipitates, dislocations, stacking faults, etc., have a dominating influence on yield, performance and reliability of the semiconductor devices. Such defects are known to cause pipes in the bulk silicon semiconductor material. Said pipes result in shorts between emitter and collector, lower breakdowns, soft junctions, non-uniform doping and many changes of carrier lifetime, of resistivity, etc. These in turn impact transistor parameters such as gain, leakage currents and saturation voltage.
The existence of pipes and their effect is well known to semiconductor designers. There are a number of types, one of which results from the surface micro-defects in the silicon wafer substrate on which is formed the epitaxial layer. These are upwardly extending pipes or dislocation lines. Another type of pipe results from micro-defects in the surface and the body of the epitaxial layer. These are downwardly extending pipes or dislocation lines and are the type principally addressed by the present invention. For example, pipes in NPN transistors appear as N type regions extending from the N emitter region to reach the N collector region through the P type base region. One technique for reducing the number of pipes is disclosed in the above-referenced, copending application by Beyer et al. In that application it is shown that by introducing nucleation sites into those regions of a semiconductor device which are to function as emitters, and subsequently introducing emitter impurities into those regions now having nucleation sites, said sites are converted into small, electrically harmless dislocation loops which minimize the type of pipe formation. The nucleation sites are preferably formed by ion implanting non-doping impurities into the selected regions.
This technique has been successful but it does require extra process steps. It would be much more desirable to reduce or eliminate pipes without the requirement of such added steps.